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Interprocedural register allocation Aggregation of global references Interprocedural I-cache optimization
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In-line expansion Leaf-routine optimization Shrink wrapping Machine idioms Tail merging Branch optimizations and conditional moves Dead-code elimination Software pipelining, with loop unrolling, variable expansion, register renaming, and hierarchical reduction Basic-block and branch scheduling 1 Register allocation by graph coloring Basic-block and branch scheduling 2 Intraprocedural I-cache optimization Instruction prefetching Data prefetching Branch prediction (to constant folding, algebraic simplifications, and reassociation) Usually, these optimizations are done very early in the compilation process, since compilation tends to lower the level of the code as it proceeds from one phase to the next. These optim izations typically are applied either to source code or to a high-level intermediate code that preserves loop structure and the sequence in which operations are performed and that has array accesses in essentially their source-code form. The correspondence between letters and code levels is as follows: The letters at the left in the diagram correspond to the levels o f code appropriate for the corresponding optim izations. Other orders are possible, and the exam ples o f real-world compilers in Chapter 21 present several alternatives, though none o f them includes all o f the optim iza tions in this diagram. Order o f Optimizations This flowchart represents a recommended order for performing optim izations in an aggres sive optimizing compiler.